Electronics demand more integrated circuits in an integrated circuit package while paradoxically providing less physical space in the system for the increased integrated circuits content. Some technologies primarily focus on integrating more functions into each integrated circuit. Other technologies focus on stacking these integrated circuits into a single package. While these approaches provide more functions within an integrated circuit, they do not fully address the requirements for lower height, smaller space, and cost reduction.
Multi-chip devices can be fabricated faster and more cheaply than a corresponding single integrated circuit, which incorporates the same or different functions. Current multi-chip module construction typically consists of a printed circuit board substrate to which a series of separate components are directly attached. This technology is advantageous because of the increase in circuit density achieved.
With increased density comes improvement in signal propagation speed and overall device weight required for the consumer electronics application, such as in cellular phones, and personal digital assistance (PDA). While integrated circuit density increases at a significant rate, the interconnection density has become a significant limiting factor in the quest for miniaturization. Key features that are required in the minimization are high density circuit packing, low cost, reliable interconnect methodology and small package profiles.
For applications such as cell phones, which require integration of a digital base band or digital signal processor (DSP) and an analog device, the strongest stacked package solutions are package-in-package (PiP) and package-on-package (PoP) systems.
The package-in-package system is a three dimensional (3D) package technology in which separately assembled and tested packages and bare dies/chips are stacked together in a single chip scale package for exceptional integration flexibility and functional density in a smaller footprint. The footprint reflects what is typically the maximum dimension of the package, namely, the x-y dimension of the package in the horizontal plane.
Electronic circuits in a package-in-package configuration, include a semiconductor element or a semiconductor chip which is mechanically attached and electrically connected to an element carrier, such as a substrate, generally together with further electronic components. An inner contact-connection is led from the element carrier to a leadframe. The encapsulated active component, the element carrier, the inner contact-connection and the leadframe are in turn enclosed with one another into a housing, such as a molding compound or an encapsulant.
In a package-in-package system, the interconnection between the stacked integrated circuit dies is typically done by using wire bonds or solder bumps. The manufacturing process for the package-in-package system is complicated by the molding encapsulation process, which is applied to protect the packages that form the package-in-package system and the wire bonding interconnection between the integrated circuit dies.
Due to the coefficient of thermal expansion (CTE) mismatch between the semiconductor chip and the substrate, the electrical interconnects are subjected to shear stresses during operation which cause them to fail prematurely. Such failures may be avoided by the effective reduction of stress on the electrical interconnect.
Despite the advantages of recent developments in integrated circuit and integrated circuit package manufacturing, there is a continuing need for improving integrated circuit device and integrated circuit package connectivity to provide improved dimensional size of available space and as well as integrity, manufacturing yield, and product reliability.
Thus, a need still remains for finding a solution to simplify the three dimensional package manufacturing process, to reduce the package size and provide improved encapsulation process while protecting the electrical interconnections, such as bond wires, from sweeping. In view of the ever-increasing need to minimize the size and the total height of the stacked package system, it is increasingly critical that answers be found to these problems.
Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures, adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.